A quantum computing performance simulator based on circuit failure probability and fault path counting

TitleA quantum computing performance simulator based on circuit failure probability and fault path counting
Publication TypeJournal Article
Year of Publication2018
AuthorsA van Rynbach, M Ahsan, and J Kim
JournalAcm Journal on Emerging Technologies in Computing Systems
Volume14
Issue1
Pagination1 - 17
Date Published03/2018
Abstract

© 2018 ACM Quantum computing performance simulators are needed to provide practical metrics for the effectiveness of executing theoretical quantum information processing protocols on physical hardware. In this work, we present a tool to simulate the execution of fault-tolerant quantum computation by automating the tracking of common fault paths for error propagation through an encoded circuit block and quantifying the failure probability of each encoded qubit throughout the circuit. Our simulator runs a fault path counter on encoded circuit blocks to determine the probability that two or more errors remain on the encoded qubits after each block is executed, and it combines errors from all the encoded blocks to estimate performance metrics such as the logical qubit failure probability, the overall circuit failure probability, the number of qubits used, and the time required to run the overall circuit. Our technique efficiently estimates the upper bound of the error probability and provides a useful measure of the error threshold at low error probabilities where conventional Monte Carlo methods are ineffective. We describe a way of simplifying the fault-tolerant measurement process in the Steane code to reduce the number of error correction steps necessary. We present simulation results comparing the execution of quantum adders, which constitute a major part of Shor’s algorithm.

DOI10.1145/3154837
Short TitleAcm Journal on Emerging Technologies in Computing Systems